Plate 01 // silicon scale

Five GPUs, one grid, drawn to scale

NVIDIA GB200, AMD MI455X, and the RTX 5090, 5080 and 5070 Ti — true die areas on a 100 mm² grid. The datacenter parts aren't single chips; both bolt a dozen pieces of silicon together behind one memory pool.

Scale1 grid sq = 100 mm²
Grid pitch10 × 10 mm
ShownLogic silicon only
ExcludedHBM / GDDR dies

Die area, to scale

Die area comparison drawn to scale Five GPUs drawn as true-area rectangles on a grid where each square equals 100 square millimetres. RTX 5070 Ti and RTX 5080 share a 378 square millimetre GB203 die. RTX 5090 uses a 750 square millimetre GB202. AMD MI455X shows eight XCD compute tiles totalling at least 1,056 square millimetres, plus undisclosed fabric and I/O dies. NVIDIA GB200 shows four Blackwell dies of about 800 square millimetres each, totalling about 3,200 square millimetres. US quarter 24.26 mm ⌀ 1 square = 100 mm² 10 × 10 mm of silicon GB203 GB203 GB202 XCD XCD XCD XCD XCD XCD XCD XCD FCD — area n/d FCD — area n/d I/O die — n/d I/O die — n/d GB100 GB100 GB100 GB100 B200 package — 2 dies, 1,600 mm² B200 package — 2 dies, 1,600 mm² RTX 5070 Ti GB203 · TSMC 4N 378 mm² RTX 5080 GB203 · TSMC 4N 378 mm² RTX 5090 GB202 · TSMC 4N 750 mm² AMD MI455X 8 XCD + 2 FCD + 2 I/O · N2 + N3P ≥ 1,056 mm² † NVIDIA GB200 4 × GB100 = 2 × B200 · 4NP ≈ 3,200 mm² † GEFORCE RTX 50 — CONSUMER PCIe ADD-IN CARD DATACENTER — LIQUID-COOLED RACK MODULE
NVIDIA silicon AMD silicon area not disclosed — drawn schematically, not counted † inferred figure — see notes

The multiple

4.3× GPU silicon area GB200 ≈3,200 mm² / 5090 750 mm²
4.5× Transistor count GB200 416 B / 5090 92.2 B
4.7× Board power GB200 2,700 W / 5090 575 W
3.5× MI455X transistors MI455X 320 B / 5090 92.2 B
1.0× RTX 5080 vs. 5070 Ti identical GB203 die, 378 mm²

Full sheet

  RTX 5070 TiGeForce RTX 5080GeForce RTX 5090GeForce MI455XAMD Instinct GB200NVIDIA superchip
Silicon layout 1 die 1 die 1 die 12 dies
8 XCD + 2 FCD + 2 I/O		 5 dies
4 GB100 + 1 Grace CPU
Logic die area 378 mm² 378 mm² 750 mm² ≥ 1,056 mm² est. ≈ 3,200 mm² est., GPU only
Transistors 45.6 B 45.6 B 92.2 B 320 B 416 B GPU only, 2 × 208 B
Process TSMC 4N TSMC 4N TSMC 4N TSMC N2 + N3P TSMC 4NP
Packaging flip-chip flip-chip flip-chip CoWoS-L + 3D hybrid bond CoWoS-L
Memory 16 GB GDDR7 16 GB GDDR7 32 GB GDDR7 432 GB HBM4 12 stacks 384 GB HBM3e + 480 GB LPDDR5X
Bandwidth 896 GB/s 960 GB/s 1,792 GB/s 23.3 TB/s 16 TB/s HBM
Board power 300 W 360 W 575 W not published 2,700 W
Form factor PCIe card PCIe card PCIe card OAM module, liquid rack module, liquid

Reading the plate

GB200 is a module, not a chip

It carries two B200 GPUs and one Grace CPU on a single board. Compared like-for-like — one GPU to one GPU — a B200 is 1,600 mm² and 208 B transistors, still 2.1× an RTX 5090's die. The Grace CPU's area is not published and is not included anywhere here.

Blackwell's 800 mm² is inferred

NVIDIA only says the GB100 die sits at the reticle limit. TSMC's EUV reticle maxes near 858 mm² and H100 landed at 814 mm², so ~800 mm² per die is the standard reading — but it is not a published number.

AMD hasn't published MI455X die areas

The 320 B transistor count is official; the areas are not. 1,056 mm² is eight XCDs at roughly 13.2 × 10.0 mm each, measured off published die imagery. The two fabric-and-cache dies and two I/O dies are substantial and undisclosed, so the true total is materially higher — likely closing much of the gap to GB200.

On MI455X, area ≠ footprint

Four XCDs are hybrid-bonded on top of each fabric die. AMD stacks vertically where NVIDIA spreads laterally, so the MI455X package is physically smaller than the silicon inside it. The plate shows silicon, not footprint.

Memory dies are excluded

Every area on this plate is logic silicon. Add MI455X's twelve HBM4 stacks or GB200's sixteen HBM3e stacks and you are counting thousands more mm² of DRAM sitting on the same interposer.

MI455X power is unknown

AMD has not published a board figure. For reference, the previous-generation MI355X was rated 1,400 W, and Helios rack deployments imply meaningfully more than that per GPU.

Sources

Blackwell architecture — GB202 / GB203 die areas VideoCardz — NVIDIA die sizes NVIDIA — GB200 NVL72 SemiWiki — Blackwell reticle-limit dies Chips and Cheese — MI455X Tom's Hardware — MI455X / CDNA 5 AMD — Instinct MI400 series TechPowerUp — Grace Blackwell power

Areas drawn to scale at 1 grid square = 100 mm². Individual die outlines are schematic — the enclosed area is accurate, the aspect ratio is approximate. Figures marked “est.” are inferred from public statements and measured imagery, not vendor specifications. Compiled from figures published through July 2026.

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